What is EDA, and what does chip design software do at each step?

EDA stands for electronic design automation: the whole set of computer software used to design chips, often just called EDA tools or chip design software. Before a chip goes to a fab, it's designed and checked many times on a computer, and every step, from writing what the circuit should do to handing it over to be made into photomasks, is done with some kind of software. Circuit boards are designed with EDA too; this article is only about chips.

The design flow itself is covered in "How are chips designed?". This one looks at which kind of software each step uses, and what it does for the people using it.

Why can't chips be drawn by hand?

Long ago, a chip had a few thousand transistors, and its patterns really were drawn by hand. Around the 1970s, chips grew too big to draw, and the first software that placed and wired things automatically appeared.

Today a phone chip has more than ten billion transistors. Even assuming just ten billion, drawing one a second without sleeping or eating would take over three hundred years. And then it would all need checking: is any wire too close to another, does every signal arrive in time? That is even further beyond what people can do.

Does the software design the chip by itself?

No. People decide what the chip does, how fast it runs and how little power it uses. Engineers give the software targets, such as "each beat can take at most this long" (a chip's circuits move to a steady beat called the clock). The software finds a way to meet them and hands back a report. Where something fails, the engineers work out why, change things and run it again.

Think of it as an assistant who is very good at math: fast and tireless, but with no idea what the chip is for.

Which kind of software does each design step use?

In the figure at the top, step 1, the spec, is decided by people. The steps below start from writing the behavior, split "Check" into two, and add the corrections made before the masks.

Step 1: Write the behavior (hardware description language)

Engineers write what the circuit should do as text, in a hardware description language (HDL). Text works because "add these two numbers on every beat" is one line, while drawn as transistors it's a whole patch of the chip. If it's written wrong, the software after it will build the mistake faithfully, which is why the next step is verification.

Step 2: Simulate and verify (simulators)

A simulator pretends on a computer that the circuit already exists, feeds it all kinds of inputs and checks whether the outputs match the spec. On a computer you can change one line and try again; actually making a chip takes months. A bug that survives to tape-out means changing the design and making new masks (see "What is chip verification?").

Step 3: Synthesize logic gates (synthesis tools)

A synthesis tool translates the written behavior into a circuit of connected logic gates (see "What are logic gates?"), using a cell library: ready-made building blocks for that particular process: logic gates, and also small circuits that remember a 0 or a 1 (flip-flops and the like), each with its speed and power worked out in advance by circuit simulation and stored as tables. There are many ways to build the same thing, so the software looks up the tables, compares, and picks one that balances speed, area and power to meet the targets. By hand, nobody could connect them all, let alone compare which way is best.

Step 4: Place and route (place-and-route tools)

This kind of software puts the logic gates onto the chip, delivers the clock to every part of it, and runs wires through several stacked layers, producing one pattern per layer, called the layout. Placement matters: the longer a wire, the slower the signal and the more power it uses. Placed badly, wires can't get through or signals arrive late, and it has to be done again.

Step 5: Check timing and power (timing analysis, power analysis)

First the resistance and capacitance of every wire is worked out from the layout; then timing analysis goes through the slowest case of every path, because on every beat each signal has to arrive before the next one. It doesn't need test inputs one by one: every path is worked out at once, and again for each condition, such as the fast and slow corners and high and low temperatures. Power analysis works out how much power the chip uses and whether the voltage on its power wires drops too far; if it does, the circuits slow down or even make mistakes.

Step 6: Check it can be made and is drawn right (rule checks, LVS)

Rule-checking software compares every shape in the layout with the fab's design rules, one rule at a time, such as how close two wires may get; another tool works the circuit back out of the layout and compares it with the original (LVS). There are far too many shapes for people to look at; only software can check the whole chip. Break a rule and the chip may come out with shorts or broken wires; get one connection wrong and it won't do what it was designed to do.

Step 7: Tape-out (hand over the layout file)

Once everything passes, the patterns for every layer are saved as files and handed to the fab: this is tape-out (see "What is tape-out?"). A mask shop makes the masks from those files, so changing the design after tape-out means making new masks.

Step 8: Corrections before the masks are made (OPC)

On the side that makes the masks, another kind of software deliberately reshapes the patterns of the finest layers. This is optical proximity correction (see "What is OPC?"). The lines on a chip are thinner than the wavelength of the light used to print them, so printed straight from the drawing, corners come out round and line ends come out short. Without it, the printed lines may not connect.

In practice, changing one step often means rerunning everything after it, back and forth many times.

How do a fab's rules get into the design software?

The software on its own doesn't know how fine a particular fab's particular process can go. The fab packages that into a set of files for the designers, often called a process design kit (PDK), like a manual written for the software:

• Design rules and rule files for the checks: used by the rule-checking software in step 6.
• Transistor models: math describing how much current flows at a given voltage, used by the simulators; usually a typical case plus several fast and slow corners.
• Layer data: which wiring layers there are and how thick each is, used for place and route and for working out resistance and capacitance.
• The cell library: sometimes included, sometimes built separately by someone else for that process.

The fab builds its models by measuring test structures it has really made and tuning the math to match. If the models are off, however carefully the software calculates, the real chip won't match.

Why does it take so many computers?

• So many things: more than ten billion transistors, and every wire has to be accounted for.
• So many conditions: fast and slow, hot and cold, high and low voltage; every combination is worked out separately.
• Change one thing, redo the math: one change often means rerunning the timing and rule checks.

So places that design chips often have large groups of computers just for running this software, splitting one job across many machines. Circuit simulation, which works out every single transistor, is the most accurate and the slowest, so it's mostly kept for small pieces of circuit; the whole chip is worked out with lookup tables instead, or it would never finish.

Is analog circuitry drawn by software too?

Mostly not. Digital circuits can be broken into building blocks of the same height for software to line up. Analog circuits handle signals that change smoothly, like sound and voltage (see "Analog vs digital chips: what's the difference?"), and the size and position of every transistor affect the result.

So analog design mostly uses the drawing kind of software: engineers draw the circuit diagram and tune it again and again with circuit simulation, and the layout is often drawn by hand, shape by shape. It still has to pass the rule checks and LVS. Tools that draw it automatically are improving, but the work still leans heavily on experience.

In fab24hr

There's no chip-designer role in the game; the main story, The life of a chip, starts after tape-out. In the prologue, "Tape-out", the design of the hearing-aid chip "Glowmere" goes to the fab and becomes a set of photomasks.

In chapter 1, "How to Split 12", you're the R&D integration engineer on the R&D line. The game doesn't show the software at work. In this chapter you decide which of the first 12 wafers are made fast or slow on purpose: the corners the design was simulated at, now made for real, to see if the design holds up. Chapter 10, "Standby Current", is at the test-and-assembly house: the test program's limit is a first version set from design simulations, and the chips in the ring at the wafer's edge sit right around it. What the numbers say and what the fab makes aren't always the same.

The companies, chip, people and numbers in the game are fictional; what EDA does comes from public, general sources, and every company does it differently. For other jargon, see Chip fab jargon in plain English.