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Semiconductors 101, unit 21
Packaging and testing
A finished wafer is not yet a usable chip. It is tested, cut apart, connected, sealed in a package and tested again before it goes into a product.
Goals
- Explain the three jobs of a package: protecting the chip, connecting its contacts to the outside, and helping it shed heat.
- Tell wafer sort (CP) from final test (FT): when each happens and what each catches.
- Describe how wire bonding and flip chip connect a chip in different ways, and read what package names like BGA and QFN describe.
Key ideas
A finished chip still can't be used as it is
A chip made on a wafer is a small piece of silicon, thin and brittle. The little metal patches on its surface that carry power and signals in and out are called pads, and they are so small you need a microscope to see them clearly. The chip also heats up while it works. Packaging puts it in a case that does three jobs at once: it keeps out knocks, dust, moisture, dirt and light; it connects the fine, crowded pads to much larger metal pins or small solder balls outside, like an adapter; and it lets heat flow through the case and pins to the circuit board. Package names like BGA and QFN describe what the package looks like from the circuit board's side: thin leads out of two sides make an SOP and out of all four a QFP, metal pads along the four edges underneath, with no leads sticking out, make a QFN, and a grid of small solder balls underneath makes a BGA. Chips with many connections can't fit them all around four sides, so they mostly use a BGA, with solder balls across the whole bottom.
The back end: test, cut, attach, connect, seal, test again
Building the circuits on the wafer is generally called the front end. Testing the wafer, cutting it apart, packaging the chips and testing them again is called the back end, or assembly and test. A common order: test every chip once, grind the wafer thinner from the back, cut it into individual chips, attach the good ones to a small board, connect them with fine wire, seal them in plastic, and test once more. This work often goes to a dedicated test-and-assembly house, because one set of machines and know-how can serve many customers.
Why test twice?
You can't tell from the outside whether a chip is bad; the only way is to power it up and give it work, so every chip takes the exam. The first test is wafer sort (CP), before the wafer is cut. A probe card carries very fine needles laid out to match the chip's pads. The wafer is pushed up until the pads touch the needles, then a little further, so the tips slide a short way; many chips have aluminum pads with a very thin, poorly conducting oxide on top, and only by scratching through it can the test machine send power and signals in and read the results back. Many cards touch several chips at once; then the wafer moves on to the next spot. Bad chips are recorded by position on a wafer map, so no money is spent packaging them. The second is final test (FT), after packaging, because cutting, connecting and sealing can all damage a chip, and some checks only work on a packaged part. Where to set the pass line is a trade-off: too tight rejects good chips, too loose lets bad ones through.
Wire bonding and flip chip: two ways to connect
Wire bonding uses metal wire finer than a hair to connect the pads around the chip's edges to the board, one by one: the machine melts the wire tip into a small ball and presses it down, using heat, pressure and ultrasound to make it stick. Flip chip instead puts a small bump on every pad, turns the chip face down and solders all the bumps at once, so pads can cover the whole surface and signals travel a shorter path. Flip chip connects more and runs faster but costs more and is hard to repair; wire bonding is cheap and mature, and is still common for chips without many pads.
Common misconceptions
- People sayA package is just a shell around the chip; it has nothing to do with how well the chip works.
- In factThe package also handles heat and signals. If heat can't get out, a chip that runs too hot makes errors or even fails. Flip chip shortens the path signals travel, and advanced packaging, which puts several chips close together in one package, is one of the ways chips keep getting more capable.
- People sayEvery chip is tested before it ships, so it won't fail soon after you start using it.
- In factTesting asks whether a chip is good right now. Some chips carry a tiny flaw, such as a wire not bonded firmly enough: they work fine at first and pass the tests, then fail after weeks or months. This is called early-life failure. For products where a failure costs a lot, such as chips for cars or medical devices, chips are often run powered at high temperature for a while before shipping, called burn-in, so the weak ones fail first and are removed. How burn-in works, and how it differs from reliability testing, is covered in the next unit.
Look: machines to take apart
Wafer proberPROBER · Assembly & test
Wire bonderWIRE BONDER · Assembly & test
Molding machineMOLDING · Assembly & test
Final testFINAL TEST · Assembly & test
Read
- What is chip packaging, and why does a finished chip still need a package?
- How are chips tested, and how is wafer sort (CP) different from final test (FT)?
- What is wire bonding, and how does a chip connect to the outside?
Further
- What do chip packages look like, and what do names like BGA and QFN mean?
- What is a probe card, and how does every chip on a wafer get tested?
- What is flip chip, and how does a chip connect through solder bumps?
- What is an OSAT, and what happens in a test-and-assembly house?
- What is SiP? Chips and small parts packed into one tiny module
Play
Start at chapter 11, "The Ball Lifted": two wire pulls test low →
Think
- More testing means more reliable chips, but also more cost and time. If you were responsible for a hearing-aid chip, how would you decide how much to test?
- Why do some companies specialize in packaging and testing instead of leaving it all to the fab?
Teaching materials: slides
The key ideas, diagram, machines and questions of this unit as a slide deck, ready to project or to put into your own handouts.
Download slides (PPTX)537 KBDownload slides (PDF)576 KB
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