What is wafer defect inspection, and how do fabs find particles and scratches?

In a chip fab, defect inspection means looking over an entire wafer to find anything that shouldn't be there: an extra particle, a scratch, a pattern with a corner missing, or residue that should have been cleaned off. Once the suspect spots are found, some of them get a close look under an electron microscope, and all of them are drawn on a map to see how they're spread out. That tells engineers which step, and which tool, went wrong.

How is defect inspection different from metrology?

Metrology asks "how much": how thick a film is, how wide a line is, how well two layers line up. It checks whether a number is right. Inspection asks "is anything wrong": is something extra here, is something missing there. How the two divide the work, and how thickness and line width are measured, is covered in "How does a chip fab know each step went right?". This article covers inspection only, from start to finish.

What does a defect on a wafer look like?

The common kinds:

• Something extra: a particle, residue left by the last step, a dried water mark.
• Something missing: a pattern with a corner gone, a line that breaks.
• Lines joined: a small extra piece sits between two lines that should be apart, connecting them.
• A scratch: something hard dragged across the surface, leaving a line.

Not every defect kills a chip. One that lands in the gap between chips, or somewhere that doesn't matter, leaves the chip working. One that breaks a line or joins two lines ruins that chip. The finer the lines, the smaller the particle that can ruin them; and the more defects, the more bad chips and the lower the yield (see "What does "yield" mean in chip news?").

How are defects found? Step by step

Step 1: Scan the whole wafer with light

The inspection tool sweeps light across the whole wafer, and wherever something looks suspect, it records the position and a rough size. Light is used because it's fast enough to cover the whole wafer; an electron microscope sees far more clearly but is far too slow, and scanning a whole wafer with it would leave lots stuck waiting. Without a full scan, you'd only check a few corners and miss everything that landed anywhere else.

Step 2: Compare each chip with its neighbor and note what's different

Every chip on a wafer has the same pattern, so the tool compares each chip with the one next to it, ignores what matches, and records each difference as a suspect spot with its coordinates. This is needed because a chip is covered in lines: from a single image, there's no telling which line was designed and which bit is extra. Without a neighbor to compare against, every line would look like a defect, and the real ones would be buried among them.

Step 3: Take a close look at some of them with an electron microscope (defect review)

Light only says "something is here, about this big", not what it is, so an electron microscope goes to the coordinates of some of the spots, takes close-up images and sorts them: particle, scratch, residue, or two lines joined. This is called defect review, and today a computer often does the first sort and a person checks it. Sorting matters because different defects come from different places; fix things without looking closely, and you may well fix the wrong tool.

Step 4: Draw every spot on a defect map and see how they're spread

Every spot has coordinates, and plotted on a picture of the wafer, they make a defect map. The shape matters because spots that scatter, gather in a clump or line up each point to a different cause (next section). Just counting "how many on this wafer" can't tell you which step is at fault: 30 scattered spots and 30 spots in an arc are two different stories.

Step 5: When the count goes past the control limit, stop and find the cause

Each scanned wafer adds one point, its defect count, to a control chart; when a point goes past the limit, the lot goes on hold and people work through the OCAP: which tools this wafer went through, and from which lot the count started rising (see "What is an SPC control chart?" and "What does OCAP mean in a chip fab?"). Stopping matters because if the cause is still there, the next lots will be hit too. Don't stop, and the faulty tool keeps processing lot after lot, ruining more and more wafers.

What do the shapes on a defect map point to?

These are directions that textbooks and papers often mention. They're clues, not answers:

• Scattered at random: looks more like particles falling at random, and it's hard to find a single cause.
• A clump: something went wrong in one spot, such as a stain left by a chemical, or a clump of debris that fell inside a tool.
• A line or an arc: often a scratch. A handling arm may have scraped the wafer, or during CMP polishing, a clump of particles in the slurry or debris on the polishing pad got dragged across it (see "What is CMP?").
• Gathered at the edge: the outermost ring of a wafer is always the hardest to make even, and the edge is also where a wafer is gripped and moved.
• The same spot in every exposure field: the scanner prints one field at a time, so the problem often follows the photomask. One speck on the mask is printed again in every field (see "What does a mask engineer do in a chip fab?"). A field often holds several chips and the speck prints on only one of them, so the neighbor comparison in step 2 still catches it; when a field holds a single chip, the subtraction cancels it out, and it has to be found by comparing with the design data or by inspecting the photomask itself (see "How does a chip fab know each step went right?").

There's one more trick: scan the same wafer before a step and again after it, and the new spots are the ones that step added. Monitor wafers, wafers kept only for checking tools, are often used this way (more in "What are monitor wafers and dummy wafers?").

When the wafer is finished, wafer sort draws every chip as good or bad, in its place, on a wafer map (see "What is WAT, and how does a wafer map show what went wrong?"). Lay the defect maps from along the way on top of it, and you can see which kinds of defects landed on chips that really failed, and which kinds didn't matter. A wafer map is read much like a defect map:

Why not scan every wafer at every step?

Each scan takes time, and there are only so many inspection tools. Scan every wafer at every step, and lots pile up in front of the inspection tools, and every wafer takes longer to finish. The smaller the things you try to find, the slower the scan and the more false alarms: tiny differences in film thickness or line width, still within spec, can also be flagged as "different".

So fabs mostly sample: from a lot (a pod holds at most 25 wafers), often only a few wafers are scanned, and only after important steps, such as after litho develop, after etch, or after CMP. The check after develop matters most: the pattern is still only in the photoresist, so a problem can be stripped off and reworked. Once it's etched, there's no going back. A new process or a just-repaired tool gets scanned more often; once it's stable, less often.

Where do particles come from?

Roughly four places:

• People: skin flakes, hair, fibers from clothing, which is why everyone in the cleanroom wears a cleanroom suit (see "What is a bunny suit, and why do chip fab workers wear one?").
• Tools: moving parts wear and shed debris; material builds up layer by layer on chamber walls and flakes off once it's thick; the arms that carry wafers can scrape or knock them.
• Chemicals, water and gases: tiny particles in the chemicals, the cleaning water and the gases fed into a tool can end up on the wafer with them.
• Air: kept out by the filters in the ceiling and the air blowing down (see "How clean is a cleanroom?").

So when extra spots show up on a defect map, the question isn't only who brought dust in. Often it's which tool, or which drum of chemicals, has a problem.

In fab24hr

Tap "Clock in", choose "A day in the fab", then on the "Your role today" card tap "Production fab", swipe to the equipment engineer and tap "CMP" under the name: you're the CMP equipment engineer. At 13:40 on the afternoon shift, Pin-Yu, the CMP process engineer, calls: MET-05 has just scanned the monitor wafer polished on CMP-02 that morning, and the surface has a few curved scratches; she has put C-4111, polished in the same window, on hold. At MET-05 you look at the defect scan map and pick out this time's problem among all the bright dots: three parallel lines curving the same way, dragged across the wafer. The few dots at the edge and the scattered small ones are always there. Then at the slurry supply cabinet you check one item after another and find the filter is clogged.

In the same fab, the litho process engineer gets a message at 18:30 on the evening shift from the After-Develop Check: P-8A02 has the same defect on every wafer, and you have to find, among the exposure fields across the wafer, the spot that sits in the same place in every field. On the wet clean process engineer's morning shift, the particle count on monitor wafers after the clean has been climbing for three days, and you compare before and after, wafer by wafer. On the quality engineer's late-night shift, the surface check before shipping samples 5 of 25 wafers, and two have scratches at the edge; one of them runs inward, into the area where the chips are.

The company, people, tool IDs and lot numbers in the game are fictional; how defect inspection works and where scratches and particles come from are based on public, general sources. For other jargon, see Chip fab jargon in plain English.