What is a high-k metal gate, and why did the transistor's gate change materials?

A high-k metal gate (often shortened to HKMG) is a way of building a transistor's gate: the very thin silicon dioxide insulator under the gate is replaced with an insulator of higher "dielectric constant" (high-k), most often an oxide containing hafnium, and the gate itself changes from polysilicon to metal. The new insulator can be made thicker and leaks far less, yet the gate controls the channel underneath about as strongly as it did through very thin silicon dioxide.

What does the gate do in a transistor?

A transistor is a small switch controlled by electricity, and the gate is the floodgate in the middle (see What is a transistor?). The gate doesn't touch the channel below it; a very thin insulating layer sits in between. Put a voltage on the gate, and through that layer it pulls electrons to the surface of the silicon, where they line up into a path that conducts.

The thinner this layer, the harder the gate pulls, and the faster and more fully the switch turns on. So for many years it got thinner along with the transistor.

For a long time this layer was silicon dioxide, grown by oxidizing the silicon surface in a furnace. The gate on top was polysilicon: silicon made of many small crystals, with atoms added so it conducts. (Where this comes in the flow: step 3 of How is a transistor made?)

Why couldn't silicon dioxide get any thinner?

Because past a certain point, electrons go straight through it.

An insulator is like a wall that electrons shouldn't get past. But once the wall is only a nanometer or two thick, just a few layers of atoms, electrons have a chance of passing straight through instead of climbing over. This only happens with very small things, and it's called tunneling.

Electrons that get through are current leaking from the gate: one more path for leakage. And it doesn't grow slowly: every little bit thinner, and many times more electrons get through. Once silicon dioxide is thinner than about two nanometers, this leakage is too large to ignore (for what billions of leaking transistors add up to, see Why do chips use power?).

What does high-k mean, and why is thicker better?

k is the symbol for dielectric constant, also written as the Greek letter κ. The dielectric constant is a property of an insulating material: the bigger the number, the more electrons the gate can pull through it at the same thickness and the same voltage. Silicon dioxide is about 3.9. Oxides containing hafnium, depending on how they're made, are usually quoted somewhere from the teens to the twenties: several times higher.

So the idea is simple: switch materials and make the layer thicker. A material with five times the dielectric constant of silicon dioxide, made five times as thick, pulls electrons just as strongly as the original layer, and with a thicker wall far fewer electrons get through.

The industry compares layers by asking "how thin would silicon dioxide have to be to do the same?" This is called the equivalent oxide thickness (EOT). The new material is physically several times thicker, yet its equivalent thickness can be just as thin, or thinner.

Why did the gate also change from polysilicon to metal?

The earliest gates were made of metal (see What is CMOS?). Then polysilicon took over for many years because it can take the heat of over a thousand degrees that comes later: you can make the gate first, then use it as a mask to form the source and drain, and the two sides always line up.

But polysilicon and the new insulators don't work well together:

• The threshold won't move: the voltage it takes to turn a switch on is called the threshold voltage, and part of it used to be set by which atoms were added to the polysilicon. Against a hafnium-containing oxide, the interface pins the threshold too high.
• Like an extra layer: when the switch is on, the thin slice of polysilicon next to the insulator "empties out" and barely conducts, which is like stacking one more insulating layer on top.

With metal, both problems get much smaller. The cost is that with metal the threshold can't be tuned by adding atoms; it comes mostly from choosing the metal itself, and the n-type and p-type switches each need a different metal.

From roughly the late 2000s, the most advanced chips switched over one after another. Older generations were built with silicon dioxide and polysilicon from the start, and many chips still use them (see The news says "mature nodes").

Step by step: how is a high-k metal gate made?

The catch is the order. After the gate is made, the source and drain still have to be formed and then heated so the atoms settle into place (annealing), and that step is very hot. Put the metal and the new insulator through that heat, and the threshold can shift. So there are two ways to do it. What follows is simplified and general.

Approach 1: gate-first

1. Lay down the insulator: after cleaning, leave a very thin layer of silicon dioxide as a base, then deposit the hafnium-containing oxide by atomic layer deposition (ALD) (see What is thin film deposition?). The base keeps the interface clean, and ALD grows at most one layer of atoms per cycle, so the whole wafer comes out evenly thick. A little thicker or thinner, and transistors in different places get different thresholds and leakage.
2. Lay down metal and pattern the gates: deposit a very thin metal, often topped with polysilicon, then print the gate lines and etch away the rest. The order is much the same as before, which is its advantage. Leave residue or damage the insulator underneath, and the switch is ruined.
3. Form the source and drain, then anneal: as before, use the gate as a mask to put in the atoms, then heat. The metal and insulator go through the heat too, and that's the weak point: the threshold can be baked off target, and only heat-tolerant metals will do.

Approach 2: gate-last (a stand-in gate first)

1. Put down a stand-in gate: make a gate out of polysilicon that will be removed later, just to hold the place (3D transistors are made this way too; see What are FinFET and GAA?). It takes the heat and works as a mask so the source and drain line up. Put the real gate in now, and the heat to come would ruin it.
2. Form the source and drain, then anneal: do the hottest steps while the stand-in gate is still there. The steps after that run much cooler, so the real gate never sees that heat.
3. Cover with insulator and polish down to the stand-in gate: cover the whole wafer with insulator and polish it flat with CMP, just until the top of the stand-in gate shows. Not far enough, and the next step can't remove it; too far, and the gate ends up too short.
4. Remove the stand-in gate and lay down the new insulator: etch the stand-in gate away, leaving a narrow trench (some flows replace the thin oxide underneath too), then line the bottom and walls of the trench with hafnium-containing oxide by ALD. The trench is narrow and every face needs the same thickness, so it takes ALD, one layer per cycle.
5. Lay down metal, fill, and polish: the n-type and p-type switches each get their own thin metal to set the threshold, then the trench is filled with a conducting metal and the excess outside is polished off. Several metals have to stack inside a narrow trench, and the big fear is not filling it; a void left behind can ruin the gate.

Which one is more common?

Gate-last has more steps and is harder. But the real gate never goes through the hottest part, so the threshold is easier to set and there are more metals to choose from. That's why the most advanced chips mostly take this route, and fin and gate-all-around transistors also start with a stand-in gate and swap in the real one at the end.

In fab24hr

The game has no high-k and no metal gate. Glowmere, the fictional hearing-aid chip in the main story, The life of a chip, uses a mature process generation, and the layer under its gate is an oxide grown in the only furnace on the R&D line.

How thin that layer grows is up to you. Tap "Clock in", choose "A day in the fab", then on the "Your role today" card tap "R&D line", swipe to the R&D process engineer and tap the Furnace area. The morning shift is a week before wafer start: the results of three runs that changed only the oxidation time are in, and you decide whether to set the time right in the middle of the target or shorten it a little and land on the thin side. Thinner switches faster; too thin, and electrons pass straight through more easily and the chip leaks in standby, while Glowmere runs on a single button cell. "Gate oxide" in the dialogue can be tapped, and under "Know a bit more" on its card is what this article is about: why the material later changed.

In the same job, tap the Wet clean area, and the morning shift asks how long wafers may wait after cleaning before going into the furnace (Q-time). What the leakage finally turns into is in chapter 10 of the main story, Standby Current.

The companies, chips, people and numbers in the game are fictional; the high-k metal gate parts come from public, general sources, simplified, and where there's no agreed number, only the order of magnitude is given. For other jargon, see Chip fab jargon in plain English.