What is a lot hold, and who decides whether to release, rework or scrap?
A hold means a lot of wafers is kept where it is and not allowed on to the next step until someone decides what to do with it. When a fab notices something is off, putting the lot on hold is one of the first things it does: stop it first, then check, then decide. The decision usually comes down to three outcomes: if nothing is wrong, release it to carry on down its route; if it can be fixed, rework it by redoing that step; if it can't be saved, scrap it. You'll hear it called a lot hold or a hold lot.
When something goes wrong, what does a fab do, in what order?
Roughly six steps:
- Notice: a person or a system sees that something is wrong.
- Stop it: put this lot on hold, and hold any other lots that may have been hit too (containment).
- Follow the plan: work through the OCAP written in advance, one step at a time.
- Decide what happens to the lot: release, rework or scrap.
- Find the root cause.
- Change things so it doesn't happen again.
This article covers the first four. For the last two, see What is root cause analysis?.
One exception: for anything that can hurt people, such as a gas leak, a chemical leak or a fire, the first step is for people to leave by the evacuation route, and the lots and tools come later (why gases need so much care: What gases does a chip fab use?).
Step 1: Notice that something is wrong
What: the signal can come from several places. A measurement is out of spec; a point on a control chart jumps outside the limits (see What is an SPC control chart?); a tool's sensor readings look wrong and FDC sends an alert (see What is FDC?); or a person sees it, such as a tool that turns red and stops, or a scratch on a wafer.
Why: the sooner it's noticed, the fewer lots are hit.
If not: the problem travels with the wafers from step to step, and by the time anyone sees it at the end, several more lots have been made.
Step 2: Stop it: hold this lot, then draw the line around what else is affected
- Put this lot on hold and write down why: in the MES (the system that tracks which step every lot is at), the lot is put on hold, so the system won't dispatch it to the next step; write down what was seen and who owns the decision, and put a tag on the pod too. Why: until you know what's wrong, every extra step a bad lot takes is one more step to clean up. If not: with no reason written, the next shift doesn't know why it can't move or whom to ask, and the lot sits on the shelf with nobody looking after it.
- Draw the line, and hold whatever may have been hit: ask "who else got hit?" Lots that ran on the same tool in the same time window, counting from the last moment everything was known to be fine, are all suspect, and all of them are held before anyone decides; the MES can tell you which lots those are. Why: when a tool has a problem, it rarely ruins just one wafer. If not: hold only the lot you saw, and other lots with the same problem keep moving, maybe all the way to a customer.
Step 3: Follow the OCAP, and do a qual run after a repair
What: follow the OCAP for that tool and that kind of problem: stop the tool, check the number wasn't a measuring mistake, call the on-call engineer (what an OCAP says: What does OCAP mean in a chip fab?).
Why: problems can happen in the middle of the night, and following an order written in advance means nobody has to work it out on the spot.
If not: everyone works from memory, one shift does it differently from the next, and a step can get missed.
A repaired tool doesn't take product right away either. When Equipment hands the tool back, that only means it runs. First a few test wafers go through a qual run to confirm the results are in spec, Process checks them too, and only then comes tool release and the lots go in. If not: if something in the repair isn't quite right, the first lot in gets hit all over again. For the wafers used to test tools, see What are monitor wafers and dummy wafers?.
Step 4: Decide what happens to the lot: release, rework or scrap
What: go through the records and measurements wafer by wafer and decide what happens to each one. This is called disposition. Wafers in the same lot can get different decisions: a few scrapped, a few reworked, the rest continue.
| Decision | When | What next |
|---|---|---|
| Release | it checks out fine, for example a re-measurement is back inside the limits | the hold comes off and the lot carries on down its route |
| Release with a deviation | the lot didn't follow the rules exactly, but it's judged still usable | write down what was different, why it's still usable and who signed; the form stays with the lot |
| Rework | the step can still be redone or topped up | for example, litho that hasn't been etched yet can have its resist stripped and be done again; measure again afterwards |
| Scrap | it can't be saved | the wafer is taken out of the lot |
Why wafer by wafer: too lenient, and bad wafers are found much later; too strict, and good wafers are thrown away. And the later the step, the more a scrap costs: a wafer goes through hundreds of steps over several months, and the closer it is to finished, the more work it carries. Rework has a cost too: one more trip, and hours more waiting.
Last, take the hold off: the hold comes off only once the decision is made and the action is done. Who took it off, and why it could come off, is recorded too. If not: when someone checks later, nobody can say why this lot was let go.
Who decides: release, rework or scrap?
Not one person on their own. A common split:
- The process engineer for that step: looks at the numbers and the tool and works out where the problem is.
- Process integration: goes through each wafer's history and decides whether it continues, gets rework or is scrapped (see What does a process integration engineer (PIE) do?).
- QA: reviews it too, checking the action is on record and everyone who needs to sign a deviation has signed; in some cases the customer has to agree as well (see What does QA (quality assurance) do in a chip fab?).
Many factories call this kind of cross-department review a material review board (MRB). The names and the split differ from fab to fab, but the idea is the same: product that doesn't meet the requirements is marked and kept apart, and the decision is recorded so you can see who approved it.
Why can't a lot just stay on hold?
A lot on hold doesn't move by itself, but the clock keeps running:
- Longer cycle time: a wafer already takes several months, and a hold adds more waiting (see How long does a wafer take to make?).
- Q-time keeps counting down: after some steps, the next one has to start within a time limit. The countdown doesn't stop for a hold, and past the limit, a lot that was fine may need rework (see What is Q-time?).
- Later delivery: when a lot a customer is waiting for is held, production control has to reschedule and work out how late it will be, and sales tells the customer (see What does production control do in a chip fab?).
So every hold needs a written reason and an owner, and someone who can say roughly when it will be decided. Holding a lot isn't the end of the job.
In fab24hr
In chapter 6 of the main story, The life of a chip, "The Call", you're the etch process engineer on call this week. From 02:47, Hao from the night shift is calling you: Chamber A of ETCH-03 has alarmed, and wafer 7 of a hot lot, H-2417, is stuck in the chamber. On the phone you tell him: mark Chamber A down, don't force wafer 7 out, do a lot split for the first 6 and send them to wet clean first, and put the rest of the lot on hold. Three lots are waiting at the wet clean tool, and you set the order. At 04:05, Hao sends a draft of the handover sheet with the hold reason and owner left blank: call back and fill them in, or reply "OK". Your call. Left blank, the 6 cleaned wafers aren't on hold in the system, and they nearly get dispatched to the next step.
In chapter 7, "Firefighting", nobody has told Ya-Ting in Integration why her lot is on hold. Kai in Equipment says that once the part is changed, all they're handing back is "the tool runs"; whether what it makes is right only counts once your qual run passes. When it passes, other lots can go in, but H-2417 stays on hold: Ya-Ting can't decide whether to top up wafer 7 until metrology has measured how much is left.
To see it from the QA side: tap "Clock in", choose "A day in the fab", then on the "Your role today" card tap "Production fab" and swipe to the quality engineer. Which of the four shifts you get depends on the time you open the site. On the late-night shift, "Release or Block", a lot of 25 wafers is due on the truck at 06:30, and 2 of the 5 sampled have scratches: check all 25 again, hold the whole lot, or pull just one wafer.
The company, people, lot numbers, tools and procedures in the game are fictional; what a hold is, the order of steps when something goes wrong and who decides follow the general wording of quality management standards and public academic sources, and real names, roles and forms differ from fab to fab. For other jargon, see Chip fab jargon in plain English.
Where you'll meet it in the gameIn chapter 6 of The life of a chip, "The Call", the night shift phones you at home at 02:47: the etch tool ETCH-03 has stopped with a wafer from a hot lot stuck inside, and what goes on hold, and what the handover sheet says, starts with that call. In chapter 7, "Firefighting", the repaired tool needs a qual run, and the held hot lot is still waiting for Integration to decide.
In fab24hr, the phone rings at 02:47: a tool has stopped with a hot lot inside. Which of three lots gets washed first, and whether to fill in the hold reason on the handover sheet, is your call.
Play chapter 6 and put a hot lot on hold over the phone in the nightTeachers: this article can go with "fab24hr in the classroom" in class.
Cite this article"What is a lot hold, and who decides whether to release, rework or scrap?" fab24hr, updated . https://fab24hr.com/en/blog/lot-hold/
Free to use in class and for non-commercial teaching: on screen, in handouts, printed for students. Please credit fab24hr. Do not sell it or present it as your own work. Spot a mistake? Report it
More articles
What is root cause analysis, and how do 8D and the 5 Whys work?
What is failure analysis (FA), and how do engineers find out why a chip failed?
What is change control in a chip fab, and why does one change need so many sign-offs?
What is MES, and how does a chip fab know where every lot of wafers is?
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