What are FEOL and BEOL? Front end vs back end, and the "back end" of packaging

"Front end" and "back end" mean two different things, so it pays to tell them apart. Inside a wafer fab, front-end-of-line processing (FEOL) builds the transistors in the silicon wafer, and back-end-of-line processing (BEOL) builds layer after layer of metal wiring above them to connect them into circuits; both happen in the fab, and the wafer stays whole the entire time. Across the industry, "front end" often means all of wafer fabrication, and "back end" means packaging and test, or assembly and test, usually done in another plant. The same words mean different things depending on who is talking and what else they are talking about.

What do the front end and back end do inside a fab?

FEOL stands for front end of line and BEOL for back end of line. The "line" is the production line: the front end is its first half, the back end its second half.

• Front end (FEOL): builds transistors, the tiny switches controlled by electricity, in the surface of the silicon. The rough order is isolation, wells, gate, source and drain, and anneal. Each step is in How is a transistor made?.
• Back end (BEOL): above the transistors, lays down insulator, digs trenches and small holes, fills them with metal and polishes flat, one layer on top of another, more than ten layers in the most advanced chips. See How is the wiring inside a chip made?.
• In between: the small holes that connect the transistors up to the first wiring layer are the contacts. They sit right on the dividing line: some count them as front end, some as back end, and some give them their own name, the middle of line (MOL).

Why split it in two, and why do the transistors always come first?

There are two reasons: heat, and metal.

Heat: some front-end steps, such as growing oxide in a furnace or heating the wafer so implanted atoms settle into place, run above a thousand degrees Celsius. Metal wiring can't take that. Once metal is on, later steps can mostly go no hotter than about four hundred degrees. So everything that needs high heat is done first, and the metal goes on after. Do the wiring first, and the heat would make the metal react with the silicon and ruin both the wires and the transistors.

Metal: the front end is afraid of metal. A trace of copper or iron on a wafer can't be seen, but in a hot furnace it works its way into the silicon and makes the transistors leak. A furnace holds a hundred or more wafers at once, so the whole load can be affected. That is why, once metal arrives, and copper above all, a fab draws a line: wafers that have had metal never go back into front-end tools, and tools and wafer pods are kept to one side or the other. How is the wiring inside a chip made? has a section on that line.

How does a wafer get from the front end to the back end?

Here is the broad order. Each step says only what is done, why, and what happens if it isn't; the details are in the linked articles.

1. Wafer start and isolation (front end): a lot of wafers goes onto the production line (wafer start). Shallow trenches are dug in the silicon and filled with insulator to mark off where each transistor goes. Without them, neighboring transistors would leak into each other.
2. Wells, gate, source and drain (front end): atoms are shot in to make the n-type and p-type base, the gate is built, then the entrance and exit for the current are implanted. These steps decide how well the switch works, and atoms put in the wrong place can't be taken out.
3. Anneal (front end): heating lets the implanted atoms settle where they belong. It is among the hottest steps on the whole route, so it has to be done before any metal goes on.
4. Contacts (middle): an insulating layer goes on, small holes are dug down to the transistors and filled with metal. A misaligned hole causes a short; one that doesn't reach the bottom doesn't connect. Once the contacts are filled, the wafer never goes through front-end high heat again.
5. Wiring, layer by layer (back end): for each layer, insulator goes down, trenches and vias (the small holes between two layers) are dug, copper fills them, and CMP polishes it flat before the next layer. There are too many wires for one layer, and without them the transistors are just isolated switches.
6. Protective layer (end of the back end): a protective layer covers the top, opened only over the metal pads used to connect to the outside. Without it, the top wiring would sit exposed to moisture and contamination. After that, test structures in the scribe lines are measured to confirm the lot came out right (see What is WAT?).
7. Out of the fab and into the industry's back end: the wafers go on to wafer sort, thinning, dicing, packaging and final test. Only now is the wafer cut apart for the first time (see How is a wafer cut into chips?).

What do front end and back end mean across the industry?

When people talk about the whole industry, the "front end" is building the circuits on the wafer, transistors and wiring both, which is all of a wafer fab's work. The "back end" is assembly and test: testing the chips on the wafer, cutting them apart, packaging them and testing them again (see What is chip packaging? and How are chips tested?).

The two are often done in different plants: the wafer fab does the front end, a test-and-assembly house the back end (see What is an OSAT?). The line isn't sharp, either. Wafer sort is done in the fab in some cases and at the test-and-assembly house in others, and some advanced packaging steps use tools and methods much like a wafer fab's (see The news says "advanced packaging". What is it?).

The Japanese words zenkōtei ("front process") and kōkōtei ("back process") mostly mean this: the first is wafer fabrication, the second assembly and test. Japanese sometimes also splits zenkōtei in two, calling the first half kiban kōtei ("substrate process") and the second half haisen kōtei ("wiring process"), which match FEOL and BEOL. "Front end" and "back end" in English news often mean this as well.

How can you tell which one someone means?

	Inside the fab	Across the industry
Front end	Building transistors in the silicon (FEOL)	All of wafer fabrication
Back end	Building metal wiring above them (BEOL)	Packaging and test
Where	Both in the wafer fab	Front end in the fab, back end often at a test-and-assembly house
The wafer	Stays whole	Gets cut apart in the back end
In English	FEOL, BEOL	front end, back end
In Japanese	FEOL (kiban kōtei), BEOL (haisen kōtei)	zenkōtei, kōkōtei

A few simple clues:

• "Of line" or not: when it's written FEOL or BEOL, it almost always means the split inside the fab.
• The words around it: vias, metal layers and contacts point to the fab's back end; packaging, wire bonding, dicing and test-and-assembly houses point to the industry's back end.
• Has the wafer been cut? If the work is still on a whole wafer in the fab's cleanroom, it's BEOL. If it's about individual chips, it's assembly and test.
• Who is talking: when fab engineers say "back end" to each other, they often mean the wiring; when news stories and industry reports say it, they often mean packaging and test.

In fab24hr

In fab24hr, tap "Clock in" and choose "A day in the fab": the R&D line, the production fab and the test-and-assembly house at the top of the "Your role today" card are three different plants. The production fab does the industry's front end, the test-and-assembly house its back end. The main story, "The life of a chip", follows the same road: Act two is in the production fab, Act three (chapters 10 to 12) in the test-and-assembly house.

The front end inside a fab is clearest in chapter 2, "Station by Station": you follow the first lot of 12 wafers through isolation and the wells, and near the end of the chapter comes the line "And this is only the very first stretch of front-end processing." Still ahead: the gate, source and drain, contacts and metal wiring, hundreds of steps.

The production fab also has an area under a "FRONT-END BAY" sign, holding the furnace, wet clean, implant, thin film and CMP. On the "Your role today" card, tap "Production fab", swipe to the process engineer and tap "Wet clean" under the name, and you're the wet clean process engineer. The fab's front end and back end are kept apart even within this one area: your WET-05 sits before the furnaces, and in the afternoon shift a report on surface metal comes in. In the evening shift a call comes in from CMP: wafers with metal lines exposed have to go to WET-07, kept for wafers with the metal layers on, and can't go into WET-05. Open the wafer prober in the codex under "Machines" and take it apart: the wafer is "a wafer that has been through every front-end process step." That "front end" is the industry's.

The companies, people, tool numbers and lot numbers in the game are fictional. How the front end and back end are split, and why, follows public, general sources and is simplified. For other jargon, see Chip fab jargon in plain English.